cmsis_iccarm.h 27.56 KiB
/**************************************************************************//**
 * @file     cmsis_iccarm.h
 * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
 * @version  V5.1.1
 * @date     30. July 2019
 ******************************************************************************/
//------------------------------------------------------------------------------
//
// Copyright (c) 2017-2019 IAR Systems
// Copyright (c) 2017-2019 Arm Limited. All rights reserved. 
// Licensed under the Apache License, Version 2.0 (the "License")
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//     http://www.apache.org/licenses/LICENSE-2.0
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//------------------------------------------------------------------------------
#ifndef __CMSIS_ICCARM_H__
#define __CMSIS_ICCARM_H__
#ifndef __ICCARM__
  #error This file should only be compiled by ICCARM
#endif
#pragma system_include
#define __IAR_FT _Pragma("inline=forced") __intrinsic
#if (__VER__ >= 8000000)
  #define __ICCARM_V8 1
#else
  #define __ICCARM_V8 0
#endif
#ifndef __ALIGNED
  #if __ICCARM_V8
    #define __ALIGNED(x) __attribute__((aligned(x)))
  #elif (__VER__ >= 7080000)
    /* Needs IAR language extensions */
    #define __ALIGNED(x) __attribute__((aligned(x)))
  #else
    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
    #define __ALIGNED(x)
  #endif
#endif
/* Define compiler macros for CPU architecture, used in CMSIS 5.
#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
/* Macros already defined */
#else
  #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
    #define __ARM_ARCH_8M_MAIN__ 1
  #elif defined(__ARM8M_BASELINE__)
    #define __ARM_ARCH_8M_BASE__ 1
  #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
    #if __ARM_ARCH == 6
      #define __ARM_ARCH_6M__ 1
    #elif __ARM_ARCH == 7
      #if __ARM_FEATURE_DSP
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#define __ARM_ARCH_7EM__ 1 #else #define __ARM_ARCH_7M__ 1 #endif #endif /* __ARM_ARCH */ #endif /* __ARM_ARCH_PROFILE == 'M' */ #endif /* Alternativ core deduction for older ICCARM's */ #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \ !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__) #if defined(__ARM6M__) && (__CORE__ == __ARM6M__) #define __ARM_ARCH_6M__ 1 #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__) #define __ARM_ARCH_7M__ 1 #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) #define __ARM_ARCH_7EM__ 1 #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__) #define __ARM_ARCH_8M_BASE__ 1 #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__) #define __ARM_ARCH_8M_MAIN__ 1 #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__) #define __ARM_ARCH_8M_MAIN__ 1 #else #error "Unknown target." #endif #endif #if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1 #define __IAR_M0_FAMILY 1 #elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1 #define __IAR_M0_FAMILY 1 #else #define __IAR_M0_FAMILY 0 #endif #ifndef __ASM #define __ASM __asm #endif #ifndef __COMPILER_BARRIER #define __COMPILER_BARRIER() __ASM volatile("":::"memory") #endif #ifndef __INLINE #define __INLINE inline #endif #ifndef __NO_RETURN #if __ICCARM_V8 #define __NO_RETURN __attribute__((__noreturn__)) #else #define __NO_RETURN _Pragma("object_attribute=__noreturn") #endif #endif #ifndef __PACKED #if __ICCARM_V8 #define __PACKED __attribute__((packed, aligned(1))) #else /* Needs IAR language extensions */ #define __PACKED __packed #endif #endif #ifndef __PACKED_STRUCT #if __ICCARM_V8